This disclosure relates to a calibration circuit capable of achieving a desired RC time constant by adjusting one of a resistance value and a capacitance value. The calibration circuit has a simple configuration and accurately achieves the desired RC time constant without requiring neither of an accurate manufacturing process and an accurate sampling clock signal.
<First Conventional Art>
A first conventional art (Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2008-537668) provides temperature compensation for a resistance value. It implements adjustment of a time constant by automatic switching of a value of a resistance or a capacitance.
FIG. 8 illustrates a basic concept of the first conventional art. The first conventional art aims at monitoring and cancelling the temperature dependence of a resistive device during an actual operation. The first conventional art maintains a resistance at a stable resistance value.
The target of calibration in the illustrated arrangement is the resistance Rx2 having a resistance value dependent on the voltage and temperature. The arrangement compares impedance Z1 of the resistance to be calibrated Rx2 and reference impedance Z2 of a reference resistance Rref2, which is provided by a switched capacitor in which a low temperature-dependent fixed capacitance Cs1 is charged and discharged using a sampling clock fs. The arrangement compare the impedances by use of a comparator CP2 that outputs a voltage V1 indicating the difference, that is, the amount of change in the impedance Z1 cause by the temperature dependence. The arrangement adjusts a value of the resistance to be calibrated Rx2 using the voltage V1.
The resistance to be calibrated Rx2 may be a replica of a resistance actually used in a main circuit. The result of the calibration can be reflected to the actual resistance. Alternatively, a resistance in an actual main route can be used as the target, and the resistance can be directly calibrated.
FIG. 9 illustrates a specific example of the first conventional art. The reference resistance Rref2 is provided by a switched capacitor including switches SW11 to SW14 and a fixed capacitance Cs1. The switches SW12 and SW13 turn on and off with a sampling clock φ1 having a sampling frequency fs. The switches SW11 and SW14 turn on and off with a sampling clock φ2. The sampling clock φ2 is in an opposite phase to the sampling clock φ1. Switches SW15 and SW16 supply a current Ibase, which is supplied from a comparison signal source, to a main route that contains the resistance to be calibrated Rx2 and to a reference route that contain the reference resistance Rref2.
The sampling frequency fs of the sampling clocks φ1 and φ2 is sufficiently spaced away from a signal frequency band (fL−fH) of the main route, which extends from the resistance to be calibrated Rx2, through a low-pass filter LPF2. to an output terminal OUT. That is, fL<fH<fs, where fH denotes a signal frequency of the main route, and fL denotes a cut-off frequency of the low-pass filter LPF2.
In FIG. 9, the fixed capacitance Cs1 in the reference resistance Rref2 is charged and discharged with a cycle of the sampling frequency fs. As a result, impedance of the reference route is |Z2|=1/Cs1·2Tπfs. Similarly, the impedance of the main route, which has the resistance to be calibrated Rx2 is Z1=Rx2.
A variation in the value of the resistance to be calibrated Rx2 can be detected by a comparison between the impedances Z1 and Z2. In actual, however, the impedances Z1 and Z2 include frequency components other than the sampling frequency fs, and these components degrade the accuracy of the comparison.
Thus, a band-pass filter BPF may be disposed before the comparator CP2 and frequency components of the impedances Z1 and Z2 at the desired sampling frequency fs are compared. Thereby, an accurate comparison voltage V1 may be generated and a control signal to adjust the value of the resistance to be calibrated Rx2 can be properly fed back. That is, by comparing for the components at the sampling frequency fs, a comparison between the impedances generated by the current Ibase is made.
A signal generated by the current Ibase is added to the path of the main route as a noise. The noise signal can be removed using a simple low-pass filter LPF2 by sufficiently separating the frequencies fH and fs away from each other.
<Second Conventional Art>
In a second conventional art (for example, Japanese Unexamined Patent Application Publication No. 2010-141651), a time constant of a filter, which is determined by a resistance and a capacitance, is adjusted.
FIG. 10 illustrates a basic concept of the second conventional art. A voltage between terminals of a reference resistance Rref3 is controlled at a reference voltage Vref_r by an operational amplifier OP11, and a current Ir3 passing through the reference resistance Rref3 is generated. A resistance to be calibrated Rx3 is a switched capacitor including a switch SW21 and a variable capacitance Cx3, which is repeatedly charged and discharged with a current generated by mirroring the current Ir3.
An averaged detection voltage Vc generated by charging and discharging the variable capacitance Cx3 is compared against a reference voltage Vref_c (=Vref_r) by a comparator CP3. A result of the comparison is output and held as a tunebit. The tunebit is supplied to a search circuit SA configured to search for a value of the variable capacitance Cx3 that generates the detection voltage Vc equal to the reference voltage Vref_c. After the completion of comparison, the turnbit is supplied to a variable capacitance (not illustrated) in an actual circuitry, and the capacitance value of this variable capacitance is determined.
The first conventional art needs the band-pass filter BPF conforming to the sampling frequency.
The first and second conventional arts achieve a target resistance value or a target time constant, which is a product of a resistance value and a capacitance value, by comparing an impedance of the resistance and an impedance of the capacitance, or an equivalent resistance of a switched capacitor, at a sampling frequency fs. The voltage and current used in the comparison of impedances are generated using a sampling clock. It is assumed that the sampling clock has an ideal waveform. Thus, the first and the second conventional arts need a sampling clock having an ideal duty ratio maintained with high accuracy.
First, the first conventional art requires that the amount of current Ibase supplied to the path of the resistance to be calibrated Rx2 and that supplied to the path of the reference resistance Rref2 be equivalent or be at a constant ratio. If this is not the case, voltage or amount of current generated by the resistance to be calibrated Rx2 and the that generated by the reference resistance Rref2 is converted in accordance with the ratio of the supplied currents. Thus, there is an error between a target value and an actual value. These situations are briefly described with reference to FIGS. 11A to 11C.
FIG. 11A illustrates an ideal case. Exactly evenly divided currents are supplied with a duty ratio of 50% to the path of the resistance to be calibrated Rx2 and to the reference resistance Rref2, i.e., I11=I12. In this case, the amounts of currents I13 and I14 (or voltages V13 and V14) supplied through the path of the resistance to be calibrated Rx2 and through the path of the reference resistance Rref2, which are used in comparison in the comparator CP2, are the same. As a result, the comparison can be made properly. The situation is the same when exactly evenly divided currents I11 and I12 are supplied with a duty ratio other than 50%, e.g., with a duty ratio of 40% as illustrated in FIG. 11B.
In contrast, as illustrated in FIG. 11C, when there is a difference between the amount of current supplied to the path of the resistance to be calibrated Rx2 and that to the path of the reference resistance Rref2 (I11≠I12), the values used in comparison in the comparator CP2 are different. That is, I13≠I14, (or V13≠V14), and the difference in duty ratio affects the signal strength.
For example, if the duty ratio is unbalanced at 6:4 (or 7:3), a difference of approximately 5% (or 20%) is present in the currents supplied to the paths. This means that, in an attempt to adjust the resistance to be calibrated Rx2 to a resistance value of 1 kΩ, the resistance value varies from 950Ω to 1050Ω (or 800Ω to 1200Ω).
In the case of the second conventional art, the duty ratio of the sampling clock having the sampling frequency fs needs to be exactly 5:5. If this is not the case, there is an error in the charges charged in the variable capacitance Cx3 illustrated in FIG. 10, and the detection voltage Vc is not properly generated, as in the case of the first conventional art. As a result, the cutoff frequency of the RC filter adjusted to a capacitance equivalent to the variable capacitance Cx3 causes an error corresponding to the unbalanced duty ratio.
The first and second conventional arts utilize a constant-current source to charge a capacitance in the switched capacitor. As a result, the capacitance is overcharged and a voltage generated across the capacitance increases with an increase in the charging time. Accordingly, if the duty ratio is unbalanced, the voltage generated by charging the capacitance differs, in comparison with the current or voltage generated when the duty ratio is at a predetermined value.